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Back Drilled Vias can Improve Bit Error Rate of PCBs
Posted on 25/05/2018

If you are using plated through holes (PTH) in thick backplane/midplanes and printed circuit boards (PCBs) with a high layer count, they might be distorting the high speed, and high frequency digital signals passing through them. Depending on the stub length of the PTH, the distortion may be severe enough to prevent digital receivers from distinguishing between a logical one and a logical zero. The situation becomes worse with increasing data rates, as the distortion introduced by the PTH stub also increases, usually at an exponential rate.

Potential Issues

The via stub introducing the undesired distortion is the portion of the PTH via that is not in series with the circuit. As the via stub does not serve any useful electrical function in the circuit, PCB manufacturers remove them by the back-drilling technique or controlled depth drilling, using a conventional NC drilling equipment. The technique uses a drill bit, with diameter slightly larger than the onethat created the original via hole, to remove the copper plating from the via stub.

Back Drilling and Bit Error Rate

Bit error rate in high-speed PCBs depends on deterministic jitter, which is a type of signal distortion and is particularly problematic as data rates increase. As the stub length of PTH contributes significantly to the signal distortion, they affect the bit error rate as well. Removing the via stubs in the path of high speed signals by back drilling helps to reduce signal distortion, thereby improving the bit error rate considerably, often by several orders of magnitude.

Back drilling of PTH vias introduces other operational advantages as well. As the technique improves impedance matching, the signal attenuation reduces. This allows the channel bandwidth to increase. In addition, the smaller stub end reduces the EMI/EMC radiation, via-to-via crosstalk, and excitation of resonance modes.

Stub Length and Distortion

As high-speed signals traveling along a trace come across a PTH with a stub, reflections from the stub end mix with the signal and create distortions. The amount of reflection depends on the equivalent impedance of the stub, which in turn, depends on the physical length of the stub. Longer the stub, greater are its shunt capacitances that reduce the equivalent stub impedance, thereby increasing the reflections.

The simplest solution to the above problem is to reduce the length of the stub—by back drilling. The residual stub length, left over after the back-drilling operation, is much smaller, resulting is smaller reflections, and hence, improving the signal integrity.

Alternative Methods

Manufacturers use several alternative methods, as back drilling can be an expensive operation. These techniques involve alternative stackup arrangements and laser-drilled vias. The designer can move traces to layers close to the end of the via stub to reduce the stub length. Although several alternative methods do exist, these techniques may not be viable from cost and manufacturing standpoints, especially for high-density and backplane/midplane PCBs. The only option in these cases is to remove the via stub by back drilling.

Conclusion

The actual length of the via stub remaining after the back-drilling operation is dependent on a number of variables. One of them is being aware of the physical location of the signal layer accurately to which the drill must travel, and this introduces a level of uncertainty. If there are any issues that are related to this design, PCB Global’s Computer Aided Manufacture (CAM) team will find this in the initial processing phase and be able to assist with reconfiguring your design to match your desired outcome and your PCB requirements.